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Adding platform detection opcodes + fix assembler bug.

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Adding flags to allow runtime detection of different esp32 models,
riscv vs xtensa, and psram.

Use this to conditionally compile hook for relevant assemblers.
This commit is contained in:
Brad Nelson
2023-01-21 21:27:29 -08:00
parent adfd238ee2
commit fe87f1574c
10 changed files with 127 additions and 0 deletions
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7
esp32/sim_main.cpp
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@ -12,6 +12,7 @@
// See the License for the specific language governing permissions and
// limitations under the License.
#include "esp32/platform.h"
#include "esp32/options.h"
#include "common/tier0_opcodes.h"
#include "common/tier1_opcodes.h"
@ -159,6 +160,12 @@ static cell_t *simulated(cell_t *sp, const char *op) {
} else if (op == STR_esp_partition_t_size) {
*++sp = 64;
return sp;
} else if (op == STR_IS_XTENSA) {
*++sp = -1;
return sp;
} else if (op == STR_IS_RISCV) {
*++sp = -1;
return sp;
} else {
fprintf(stderr, "MISSING SIM OPCODE: %s\n", op);
exit(1);