From fe87f1574c4d33f6ce66a7199081e5838d7707fe Mon Sep 17 00:00:00 2001 From: Brad Nelson Date: Sat, 21 Jan 2023 21:27:29 -0800 Subject: [PATCH] Adding platform detection opcodes + fix assembler bug. Adding flags to allow runtime detection of different esp32 models, riscv vs xtensa, and psram. Use this to conditionally compile hook for relevant assemblers. --- Makefile | 2 ++ common/forth_namespace_tests.fs | 11 +++++++ esp32/builtins.h | 10 ++++++ esp32/options.h | 36 +++++++++++++++++++++ esp32/platform.h | 55 +++++++++++++++++++++++++++++++++ esp32/print-builtins.cpp | 1 + esp32/riscv-assembler.fs | 2 ++ esp32/sim_main.cpp | 7 +++++ esp32/template.ino | 1 + esp32/xtensa-assembler.fs | 2 ++ 10 files changed, 127 insertions(+) create mode 100644 esp32/platform.h diff --git a/Makefile b/Makefile index b90be2b..3c0a19e 100644 --- a/Makefile +++ b/Makefile @@ -485,6 +485,7 @@ ESP32_PARTS = tools/replace.js \ common/core.h \ common/interp.h \ esp32/faults.h \ + esp32/platform.h \ esp32/options.h \ esp32/builtins.h \ esp32/builtins.cpp \ @@ -505,6 +506,7 @@ $(ESP32)/ESP32forth/ESP32forth.ino: $(ESP32_PARTS) | $(ESP32)/ESP32forth core=@common/core.h \ interp=@common/interp.h \ faults=@esp32/faults.h \ + platform=@esp32/platform.h \ options=@esp32/options.h \ builtins.h=@esp32/builtins.h \ builtins.cpp=@esp32/builtins.cpp \ diff --git a/common/forth_namespace_tests.fs b/common/forth_namespace_tests.fs index 8f249cd..7285ab4 100644 --- a/common/forth_namespace_tests.fs +++ b/common/forth_namespace_tests.fs @@ -660,7 +660,18 @@ e: check-esp32-platform out: default-type ;e +e: check-esp32-platform-flags + out: ESP32? + out: ESP32-S2? + out: ESP32-S3? + out: ESP32-C3? + out: PSRAM? + out: Xtensa? + out: RISC-V? +;e + e: check-esp32-builtins + check-esp32-platform-flags out: pinMode out: digitalWrite out: digitalRead diff --git a/esp32/builtins.h b/esp32/builtins.h index c7b3fe0..d9a2db4 100644 --- a/esp32/builtins.h +++ b/esp32/builtins.h @@ -35,6 +35,7 @@ static cell_t ResizeFile(cell_t fd, cell_t size); #define PLATFORM_OPCODE_LIST \ USER_WORDS \ + REQUIRED_PLATFORM_SUPPORT \ REQUIRED_ESP_SUPPORT \ REQUIRED_MEMORY_SUPPORT \ REQUIRED_SERIAL_SUPPORT \ @@ -70,6 +71,15 @@ static cell_t ResizeFile(cell_t fd, cell_t size); YV(internals, heap_caps_realloc, \ tos = (cell_t) heap_caps_realloc(a2, n1, n0); NIPn(2)) +#define REQUIRED_PLATFORM_SUPPORT \ + X("ESP32?", IS_ESP32, PUSH UEFORTH_PLATFORM_IS_ESP32) \ + X("ESP32-S2?", IS_ESP32S2, PUSH UEFORTH_PLATFORM_IS_ESP32S2) \ + X("ESP32-S3?", IS_ESP32S3, PUSH UEFORTH_PLATFORM_IS_ESP32S3) \ + X("ESP32-C3?", IS_ESP32C3, PUSH UEFORTH_PLATFORM_IS_ESP32C3) \ + X("PSRAM?", HAS_PSRAM, PUSH UEFORTH_PLATFORM_HAS_PSRAM) \ + X("Xtensa?", IS_XTENSA, PUSH UEFORTH_PLATFORM_IS_XTENSA) \ + X("RISC-V?", IS_RISCV, PUSH UEFORTH_PLATFORM_IS_RISCV) + #define REQUIRED_ESP_SUPPORT \ YV(ESP, getHeapSize, PUSH ESP.getHeapSize()) \ YV(ESP, getFreeHeap, PUSH ESP.getFreeHeap()) \ diff --git a/esp32/options.h b/esp32/options.h index ad445d9..94cf265 100644 --- a/esp32/options.h +++ b/esp32/options.h @@ -84,6 +84,42 @@ # define USER_VOCABULARIES #endif +#if defined(CONFIG_IDF_TARGET_ESP32) +# define UEFORTH_PLATFORM_IS_ESP32 -1 +#else +# define UEFORTH_PLATFORM_IS_ESP32 0 +#endif + +#if defined(CONFIG_IDF_TARGET_ESP32S2) +# define UEFORTH_PLATFORM_IS_ESP32S2 -1 +#else +# define UEFORTH_PLATFORM_IS_ESP32S2 0 +#endif + +#if defined(CONFIG_IDF_TARGET_ESP32S3) +# define UEFORTH_PLATFORM_IS_ESP32S3 -1 +#else +# define UEFORTH_PLATFORM_IS_ESP32S3 0 +#endif + +#if defined(CONFIG_IDF_TARGET_ESP32C3) +# define UEFORTH_PLATFORM_IS_ESP32C3 -1 +#else +# define UEFORTH_PLATFORM_IS_ESP32C3 0 +#endif + +#if defined(BOARD_HAS_PSRAM) +# define UEFORTH_PLATFORM_HAS_PSRAM -1 +#else +# define UEFORTH_PLATFORM_HAS_PSRAM 0 +#endif + +#if defined(BOARD_HAS_PSRAM) +# define UEFORTH_PLATFORM_HAS_PSRAM -1 +#else +# define UEFORTH_PLATFORM_HAS_PSRAM 0 +#endif + #define VOCABULARY_LIST \ V(forth) V(internals) \ V(rtos) V(SPIFFS) V(serial) V(SD) V(SD_MMC) V(ESP) \ diff --git a/esp32/platform.h b/esp32/platform.h new file mode 100644 index 0000000..b59ed74 --- /dev/null +++ b/esp32/platform.h @@ -0,0 +1,55 @@ +// Copyright 2023 Bradley D. Nelson +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#if defined(CONFIG_IDF_TARGET_ESP32) +# define UEFORTH_PLATFORM_IS_ESP32 (-1) +#else +# define UEFORTH_PLATFORM_IS_ESP32 0 +#endif + +#if defined(CONFIG_IDF_TARGET_ESP32S2) +# define UEFORTH_PLATFORM_IS_ESP32S2 (-1) +#else +# define UEFORTH_PLATFORM_IS_ESP32S2 0 +#endif + +#if defined(CONFIG_IDF_TARGET_ESP32S3) +# define UEFORTH_PLATFORM_IS_ESP32S3 (-1) +#else +# define UEFORTH_PLATFORM_IS_ESP32S3 0 +#endif + +#if defined(CONFIG_IDF_TARGET_ESP32C3) +# define UEFORTH_PLATFORM_IS_ESP32C3 (-1) +#else +# define UEFORTH_PLATFORM_IS_ESP32C3 0 +#endif + +#if defined(BOARD_HAS_PSRAM) +# define UEFORTH_PLATFORM_HAS_PSRAM (-1) +#else +# define UEFORTH_PLATFORM_HAS_PSRAM 0 +#endif + +#if defined(__XTENSA__) +# define UEFORTH_PLATFORM_IS_XTENSA (-1) +#else +# define UEFORTH_PLATFORM_IS_XTENSA 0 +#endif + +#if defined(__riscv) +# define UEFORTH_PLATFORM_IS_RISCV (-1) +#else +# define UEFORTH_PLATFORM_IS_RISCV 0 +#endif diff --git a/esp32/print-builtins.cpp b/esp32/print-builtins.cpp index d98e75c..3415d09 100644 --- a/esp32/print-builtins.cpp +++ b/esp32/print-builtins.cpp @@ -18,6 +18,7 @@ #define SIM_PRINT_ONLY #define ENABLE_OLED_SUPPORT +#include "esp32/platform.h" #include "esp32/options.h" #define CALLING_OPCODE_LIST #define FLOATING_POINT_LIST diff --git a/esp32/riscv-assembler.fs b/esp32/riscv-assembler.fs index 58a98cc..97788be 100644 --- a/esp32/riscv-assembler.fs +++ b/esp32/riscv-assembler.fs @@ -12,6 +12,8 @@ \ See the License for the specific language governing permissions and \ limitations under the License. +RISC-V? [IF] + ( Lazy loaded RISC-V assembler ) : riscv-assembler r| diff --git a/esp32/sim_main.cpp b/esp32/sim_main.cpp index c3e681f..8845a69 100644 --- a/esp32/sim_main.cpp +++ b/esp32/sim_main.cpp @@ -12,6 +12,7 @@ // See the License for the specific language governing permissions and // limitations under the License. +#include "esp32/platform.h" #include "esp32/options.h" #include "common/tier0_opcodes.h" #include "common/tier1_opcodes.h" @@ -159,6 +160,12 @@ static cell_t *simulated(cell_t *sp, const char *op) { } else if (op == STR_esp_partition_t_size) { *++sp = 64; return sp; + } else if (op == STR_IS_XTENSA) { + *++sp = -1; + return sp; + } else if (op == STR_IS_RISCV) { + *++sp = -1; + return sp; } else { fprintf(stderr, "MISSING SIM OPCODE: %s\n", op); exit(1); diff --git a/esp32/template.ino b/esp32/template.ino index b422167..b556050 100644 --- a/esp32/template.ino +++ b/esp32/template.ino @@ -19,6 +19,7 @@ * Revision: {{REVISION}} */ +{{platform}} {{options}} {{tier0_opcodes}} {{tier1_opcodes}} diff --git a/esp32/xtensa-assembler.fs b/esp32/xtensa-assembler.fs index fcf79aa..bf475a2 100644 --- a/esp32/xtensa-assembler.fs +++ b/esp32/xtensa-assembler.fs @@ -12,6 +12,8 @@ \ See the License for the specific language governing permissions and \ limitations under the License. +Xtensa? [IF] + ( Lazy loaded xtensa assembler ) : xtensa-assembler r|