Refactor fault handling.

This commit is contained in:
Brad Nelson
2023-01-14 22:28:38 -08:00
parent f8cfaedc84
commit 2f79192ea0
9 changed files with 110 additions and 79 deletions

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@ -345,8 +345,6 @@ $(WEB)/ueforth.js: \
# ---- POSIX ---- # ---- POSIX ----
POSIX_CFLAGS = -DHAS_SIGNALS
posix: posix_target posix_tests posix: posix_target posix_tests
posix_target: $(POSIX)/ueforth posix_target: $(POSIX)/ueforth
@ -355,6 +353,7 @@ $(POSIX):
$(POSIX)/ueforth: \ $(POSIX)/ueforth: \
posix/main.c \ posix/main.c \
posix/faults.h \
common/tier0_opcodes.h \ common/tier0_opcodes.h \
common/tier1_opcodes.h \ common/tier1_opcodes.h \
common/tier2_opcodes.h \ common/tier2_opcodes.h \
@ -365,7 +364,7 @@ $(POSIX)/ueforth: \
common/bits.h \ common/bits.h \
common/core.h \ common/core.h \
$(GEN)/posix_boot.h | $(POSIX) $(GEN)/posix_boot.h | $(POSIX)
$(CXX) $(CFLAGS) $(POSIX_CFLAGS) $< -o $@ $(LIBS) $(CXX) $(CFLAGS) $< -o $@ $(LIBS)
strip $(STRIP_ARGS) $@ strip $(STRIP_ARGS) $@
# ---- WINDOWS ---- # ---- WINDOWS ----
@ -434,6 +433,7 @@ $(GEN)/esp32_sim_opcodes.h: $(GEN)/print-esp32-builtins | $(GEN)
$(ESP32_SIM)/Esp32forth-sim: \ $(ESP32_SIM)/Esp32forth-sim: \
esp32/sim_main.cpp \ esp32/sim_main.cpp \
esp32/main.cpp \ esp32/main.cpp \
esp32/faults.h \
common/tier0_opcodes.h \ common/tier0_opcodes.h \
common/tier1_opcodes.h \ common/tier1_opcodes.h \
common/tier2_opcodes.h \ common/tier2_opcodes.h \
@ -468,6 +468,7 @@ ESP32_PARTS = tools/replace.js \
common/bits.h \ common/bits.h \
common/core.h \ common/core.h \
common/interp.h \ common/interp.h \
esp32/faults.h \
esp32/options.h \ esp32/options.h \
esp32/builtins.h \ esp32/builtins.h \
esp32/builtins.cpp \ esp32/builtins.cpp \
@ -487,6 +488,7 @@ $(ESP32)/ESP32forth/ESP32forth.ino: $(ESP32_PARTS) | $(ESP32)/ESP32forth
bits=@common/bits.h \ bits=@common/bits.h \
core=@common/core.h \ core=@common/core.h \
interp=@common/interp.h \ interp=@common/interp.h \
faults=@esp32/faults.h \
options=@esp32/options.h \ options=@esp32/options.h \
builtins.h=@esp32/builtins.h \ builtins.h=@esp32/builtins.h \
builtins.cpp=@esp32/builtins.cpp \ builtins.cpp=@esp32/builtins.cpp \

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@ -12,43 +12,10 @@
// See the License for the specific language governing permissions and // See the License for the specific language governing permissions and
// limitations under the License. // limitations under the License.
#if defined(HAS_SIGNALS) || defined(ENABLE_ESP32_FORTH_FAULT_HANDLING)
# include <setjmp.h>
#endif
#if defined(HAS_SIGNALS)
# include <signal.h>
#endif
#define JMPW goto **(void **) w #define JMPW goto **(void **) w
#define NEXT w = *ip++; JMPW #define NEXT w = *ip++; JMPW
#define ADDROF(x) (&& OP_ ## x) #define ADDROF(x) (&& OP_ ## x)
#if defined(HAS_SIGNALS) || defined(ENABLE_ESP32_FORTH_FAULT_HANDLING)
static __thread jmp_buf g_forth_fault;
static __thread int g_forth_signal;
#endif
#if defined(HAS_SIGNALS)
static void forth_signal_handler(int sig) {
g_forth_signal = sig;
sigset_t ss;
sigemptyset(&ss);
sigprocmask(SIG_SETMASK, &ss, 0);
longjmp(g_forth_fault, 1);
}
#endif
#if defined(ENABLE_ESP32_FORTH_FAULT_HANDLING)
# include "soc/soc.h"
# include <xtensa/xtensa_api.h>
static __thread uint32_t g_forth_setlevel;
static void IRAM_ATTR forth_exception_handler(XtExcFrame *frame) {
g_forth_signal = frame->exccause;
XTOS_RESTORE_INTLEVEL(g_forth_setlevel);
longjmp(g_forth_fault, 1);
}
#endif
static cell_t *forth_run(cell_t *init_rp) { static cell_t *forth_run(cell_t *init_rp) {
static const BUILTIN_WORD builtins[] = { static const BUILTIN_WORD builtins[] = {
#define Z(flags, name, op, code) \ #define Z(flags, name, op, code) \
@ -65,46 +32,12 @@ static cell_t *forth_run(cell_t *init_rp) {
if (!init_rp) { if (!init_rp) {
g_sys->DOCREATE_OP = ADDROF(DOCREATE); g_sys->DOCREATE_OP = ADDROF(DOCREATE);
g_sys->builtins = builtins; g_sys->builtins = builtins;
#if defined(HAS_SIGNALS) forth_faults_setup();
struct sigaction sa;
memset(&sa, 0, sizeof(sa));
sa.sa_handler = forth_signal_handler;
sigaction(SIGSEGV, &sa, 0);
sigaction(SIGBUS, &sa, 0);
sigaction(SIGINT, &sa, 0);
sigaction(SIGFPE, &sa, 0);
#endif
#if defined(ENABLE_ESP32_FORTH_FAULT_HANDLING)
xt_set_exception_handler(EXCCAUSE_LOAD_STORE_ERROR, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_PRIVILEGED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_UNALIGNED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_DIVIDE_BY_ZERO, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_INSTR_ERROR, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_ILLEGAL, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_LOAD_PROHIBITED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_STORE_PROHIBITED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_INSTR_PROHIBITED, forth_exception_handler);
uint32_t default_setlevel = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
XTOS_RESTORE_INTLEVEL(default_setlevel);
g_forth_setlevel = default_setlevel;
#endif
return 0; return 0;
} }
register cell_t *ip, *rp, *sp, tos, w; register cell_t *ip, *rp, *sp, tos, w;
register float *fp, ft; register float *fp, ft;
rp = init_rp; UNPARK; rp = init_rp; UNPARK; FAULT_ENTRY; NEXT;
#if defined(HAS_SIGNALS) || defined(ENABLE_ESP32_FORTH_FAULT_HANDLING)
if (setjmp(g_forth_fault)) {
rp = *g_sys->throw_handler;
*g_sys->throw_handler = (cell_t *) *rp--;
sp = (cell_t *) *rp--;
fp = (float *) *rp--;
ip = (cell_t *) *rp--;
--sp;
tos = -g_forth_signal;
}
#endif
NEXT;
#define Z(flags, name, op, code) OP_ ## op: { code; } NEXT; #define Z(flags, name, op, code) OP_ ## op: { code; } NEXT;
PLATFORM_OPCODE_LIST PLATFORM_OPCODE_LIST
TIER2_OPCODE_LIST TIER2_OPCODE_LIST

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@ -34,6 +34,9 @@ typedef uintptr_t ucell_t;
#define PARK DUP; *++rp = (cell_t) fp; *++rp = (cell_t) sp; *++rp = (cell_t) ip #define PARK DUP; *++rp = (cell_t) fp; *++rp = (cell_t) sp; *++rp = (cell_t) ip
#define UNPARK ip = (cell_t *) *rp--; sp = (cell_t *) *rp--; fp = (float *) *rp--; DROP #define UNPARK ip = (cell_t *) *rp--; sp = (cell_t *) *rp--; fp = (float *) *rp--; DROP
#define THROWIT(n) rp = *g_sys->throw_handler; *g_sys->throw_handler = (cell_t *) *rp--; \
sp = (cell_t *) *rp--; fp = (float *) *rp--; ip = (cell_t *) *rp--; \
NIP; tos = (n);
#define TOFLAGS(xt) ((uint8_t *) (((cell_t *) (xt)) - 1)) #define TOFLAGS(xt) ((uint8_t *) (((cell_t *) (xt)) - 1))
#define TONAMELEN(xt) (TOFLAGS(xt) + 1) #define TONAMELEN(xt) (TOFLAGS(xt) + 1)

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@ -17,6 +17,7 @@ static char filename2[PATH_MAX];
{{bits}} {{bits}}
{{core}} {{core}}
{{faults}}
{{interp}} {{interp}}
{{boot}} {{boot}}

54
esp32/faults.h Normal file
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@ -0,0 +1,54 @@
// Copyright 2023 Bradley D. Nelson
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#if defined(ENABLE_ESP32_FORTH_FAULT_HANDLING)
#include <setjmp.h>
#include "soc/soc.h"
#include <xtensa/xtensa_api.h>
static __thread jmp_buf g_forth_fault;
static __thread int g_forth_signal;
static __thread uint32_t g_forth_setlevel;
#define FAULT_ENTRY \
if (setjmp(g_forth_fault)) { THROWIT(-g_forth_signal); }
static void IRAM_ATTR forth_exception_handler(XtExcFrame *frame) {
g_forth_signal = frame->exccause;
XTOS_RESTORE_INTLEVEL(g_forth_setlevel);
longjmp(g_forth_fault, 1);
}
static void forth_faults_setup(void) {
xt_set_exception_handler(EXCCAUSE_LOAD_STORE_ERROR, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_PRIVILEGED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_UNALIGNED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_DIVIDE_BY_ZERO, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_INSTR_ERROR, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_ILLEGAL, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_LOAD_PROHIBITED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_STORE_PROHIBITED, forth_exception_handler);
xt_set_exception_handler(EXCCAUSE_INSTR_PROHIBITED, forth_exception_handler);
uint32_t default_setlevel = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
XTOS_RESTORE_INTLEVEL(default_setlevel);
g_forth_setlevel = default_setlevel;
}
#else
#define forth_faults_setup()
#define FAULT_ENTRY
#endif

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@ -42,6 +42,9 @@ PLATFORM_SIMULATED_OPCODE_LIST
// Fault handling can't work in the simulator for now. // Fault handling can't work in the simulator for now.
#undef ENABLE_ESP32_FORTH_FAULT_HANDLING #undef ENABLE_ESP32_FORTH_FAULT_HANDLING
#define forth_faults_setup()
#define FAULT_ENTRY
#include "common/bits.h" #include "common/bits.h"
#include "common/core.h" #include "common/core.h"
#include "common/interp.h" #include "common/interp.h"

40
posix/faults.h Normal file
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@ -0,0 +1,40 @@
// Copyright 2023 Bradley D. Nelson
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <setjmp.h>
#include <signal.h>
static __thread jmp_buf g_forth_fault;
static __thread int g_forth_signal;
#define FAULT_ENTRY \
if (setjmp(g_forth_fault)) { THROWIT(-g_forth_signal); }
static void forth_signal_handler(int sig) {
g_forth_signal = sig;
sigset_t ss;
sigemptyset(&ss);
sigprocmask(SIG_SETMASK, &ss, 0);
longjmp(g_forth_fault, 1);
}
static void forth_faults_setup(void) {
struct sigaction sa;
memset(&sa, 0, sizeof(sa));
sa.sa_handler = forth_signal_handler;
sigaction(SIGSEGV, &sa, 0);
sigaction(SIGBUS, &sa, 0);
sigaction(SIGINT, &sa, 0);
sigaction(SIGFPE, &sa, 0);
}

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@ -34,6 +34,7 @@
#include "common/bits.h" #include "common/bits.h"
#include "common/core.h" #include "common/core.h"
#include "posix/faults.h"
#include "common/interp.h" #include "common/interp.h"
#include "gen/posix_boot.h" #include "gen/posix_boot.h"

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@ -62,13 +62,7 @@ work:
} }
} }
} __except (1) { } __except (1) {
rp = *g_sys->throw_handler; THROWIT(GetExceptionCode());
*g_sys->throw_handler = (cell_t *) *rp--;
sp = (cell_t *) *rp--;
fp = (float *) *rp--;
ip = (cell_t *) *rp--;
--sp;
tos = GetExceptionCode();
} }
} }
} }