Adding 2@ and 2!, timers, shifts, mask ops.
This commit is contained in:
@ -145,10 +145,10 @@ ESP32_BOOT = common/boot.fs common/conditionals.fs common/vocabulary.fs \
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esp32/bindings.fs common/highlevel.fs \
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esp32/bindings.fs common/highlevel.fs \
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common/filetools.fs common/utils.fs common/locals.fs \
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common/filetools.fs common/utils.fs common/locals.fs \
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common/tasks.fs common/streams.fs esp32/web_interface.fs \
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common/tasks.fs common/streams.fs esp32/web_interface.fs \
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esp32/registers.fs esp32/timers.fs \
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esp32/bterm.fs esp32/telnetd.fs \
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esp32/bterm.fs esp32/telnetd.fs \
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esp32/camera.fs common/blocks.fs \
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esp32/camera.fs common/blocks.fs \
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esp32/autoboot.fs \
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esp32/autoboot.fs common/fini.fs
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common/fini.fs
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$(GEN)/esp32_boot.h: common/source_to_string.js $(ESP32_BOOT) | $(GEN)
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$(GEN)/esp32_boot.h: common/source_to_string.js $(ESP32_BOOT) | $(GEN)
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echo "ok" | cat $(ESP32_BOOT) - | $< boot $(VERSION) $(REVISION) >$@
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echo "ok" | cat $(ESP32_BOOT) - | $< boot $(VERSION) $(REVISION) >$@
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@ -1,8 +1,6 @@
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: ( 41 parse drop drop ; immediate
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: ( 41 parse drop drop ; immediate
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( Useful Basic Compound Words )
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( Useful Basic Compound Words )
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: 2drop ( n n -- ) drop drop ;
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: 2dup ( a b -- a b a b ) over over ;
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: nip ( a b -- b ) swap drop ;
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: nip ( a b -- b ) swap drop ;
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: rdrop ( r: n n -- ) r> r> drop >r ;
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: rdrop ( r: n n -- ) r> r> drop >r ;
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: */ ( n n n -- n ) */mod nip ;
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: */ ( n n n -- n ) */mod nip ;
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@ -28,6 +26,12 @@
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: 4* 4 * ; : 4/ 4 / ;
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: 4* 4 * ; : 4/ 4 / ;
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: +! ( n a -- ) swap over @ + swap ! ;
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: +! ( n a -- ) swap over @ + swap ! ;
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( Double Words )
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: 2drop ( n n -- ) drop drop ;
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: 2dup ( a b -- a b a b ) over over ;
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: 2@ ( a -- lo hi ) dup @ swap cell+ @ ;
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: 2! ( lo hi a -- ) dup >r cell+ ! r> ! ;
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( Line Comments )
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( Line Comments )
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: \ nl parse drop drop ; immediate
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: \ nl parse drop drop ; immediate
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@ -39,6 +39,8 @@ typedef int64_t dcell_t;
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X("U/MOD", USMOD, w = *sp; *sp = (ucell_t) w % (ucell_t) tos; \
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X("U/MOD", USMOD, w = *sp; *sp = (ucell_t) w % (ucell_t) tos; \
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tos = (ucell_t) w / (ucell_t) tos) \
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tos = (ucell_t) w / (ucell_t) tos) \
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X("*/MOD", SSMOD, SSMOD_FUNC) \
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X("*/MOD", SSMOD, SSMOD_FUNC) \
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Y(LSHIFT, tos = (*sp-- << tos)) \
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Y(RSHIFT, tos = (*sp-- >> tos)) \
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Y(AND, tos &= *sp--) \
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Y(AND, tos &= *sp--) \
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Y(OR, tos |= *sp--) \
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Y(OR, tos |= *sp--) \
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Y(XOR, tos ^= *sp--) \
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Y(XOR, tos ^= *sp--) \
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8
ueforth/esp32/registers.fs
Normal file
8
ueforth/esp32/registers.fs
Normal file
@ -0,0 +1,8 @@
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vocabulary registers registers definitions
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( Tools for working with bit masks )
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: m! ( val shift mask a -- )
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dup >r @ over invert and >r >r lshift r> and r> or r> ! ;
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: m@ ( shift mask a -- val ) @ and swap rshift ;
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only forth definitions
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44
ueforth/esp32/timers.fs
Normal file
44
ueforth/esp32/timers.fs
Normal file
@ -0,0 +1,44 @@
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vocabulary timers timers definitions also registers
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$3ff5f00 constant TIMG_BASE
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( group n = 0/1, timer x = 0/1, watchdog m = 0-5 )
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: TIMGn ( n x -- a ) $10000 * + TIMG_BASE + ;
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: TIMGn_Tx ( n x -- a ) $24 * swap TIMGn + ;
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: TIMGn_TxCONFIG_REG ( n x -- a ) TIMGn_Tx 0 cells + ;
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: TIMGn_TxLOHI_REG ( n x -- a ) TIMGn_Tx 1 cells + ;
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: TIMGn_TxUPDATE_REG ( n x -- a ) TIMGn_Tx 3 cells + ;
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: TIMGn_TxALARMLOHI_REG ( n x -- a ) TIMGn_Tx 4 cells + ;
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: TIMGn_TxLOADLOHI_REG ( n x -- a ) TIMGn_Tx 6 cells + ;
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: TIMGn_TxLOAD_REG ( n x -- a ) TIMGn_Tx 8 cells + ;
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: TIMGn_Tx_WDTCONFIGm_REG ( n m -- a ) swap TIMGn cells + $48 + ;
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: TIMGn_Tx_WDTFEED_REG ( n -- a ) TIMGn $60 + ;
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: TIMGn_Tx_WDTWPROTECT_REG ( n -- a ) TIMGn $6c + ;
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: TIMGn_RTCCALICFG_REG ( n -- a ) TIMGn $68 + ;
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: TIMGn_RTCCALICFG1_REG ( n -- a ) TIMGn $6c + ;
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: TIMGn_Tx_INT_ENA_REG ( n -- a ) TIMGn $98 + ;
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: TIMGn_Tx_INT_RAW_REG ( n -- a ) TIMGn $9c + ;
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: TIMGn_Tx_INT_ST_REG ( n -- a ) TIMGn $a0 + ;
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: TIMGn_Tx_INT_CLR_REG ( n -- a ) TIMGn $a4 + ;
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: t>nx ( t -- n x ) dup 2/ 1 and swap 1 and ;
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: timer@ ( t -- lo hi )
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dup t>nx TIMGn_TxUPDATE_REG 0 swap !
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t>nx TIMGn_TxLOHI_REG 2@ ;
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: timer! ( lo hi t -- )
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dup >r t>nx TIMGn_TxLOADLOHI_REG 2!
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r> t>nx TIMGn_TxLOAD_REG 0 swap ! ;
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: alarm ( t -- a ) t>nx TIMGn_TxALARMLOHI_REG ;
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: enable! ( v t ) >r 31 $80000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
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: increase! ( v t ) >r 30 $40000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
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: autoreload! ( v t ) >r 29 $20000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
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: divider! ( v t ) >r 3 $1ffffff8 r> t>nx TIMGn_TxCONFIG_REG m! ;
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: edgeint! ( v t ) >r 2 $4 r> t>nx TIMGn_TxCONFIG_REG m! ;
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: levelint! ( v t ) >r 1 $2 r> t>nx TIMGn_TxCONFIG_REG m! ;
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: alarm-enable! ( v t ) >r 0 $1 r> t>nx TIMGn_TxCONFIG_REG m! ;
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only forth definitions
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@ -70,8 +70,9 @@ are then used to build up a small set of core opcodes defined in 1-3 lines each:
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<pre>
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<pre>
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0= 0< + U/MOD */MOD AND OR XOR
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0= 0< + U/MOD */MOD AND OR XOR
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DUP SWAP OVER DROP @ L@ C@ ! L! C!
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LSHIFT RSHIFT DUP SWAP OVER DROP
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SP@ SP! RP@ RP! >R R> R@ : ; EXIT
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@ L@ C@ ! L! C! SP@ SP! RP@ RP!
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>R R> R@ : ; EXIT
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EXECUTE BRANCH 0BRANCH DONEXT DOLIT
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EXECUTE BRANCH 0BRANCH DONEXT DOLIT
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ALITERAL CELL DOES> IMMEDIATE 'SYS
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ALITERAL CELL DOES> IMMEDIATE 'SYS
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</pre>
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</pre>
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