Adding 2@ and 2!, timers, shifts, mask ops.

This commit is contained in:
Brad Nelson
2021-04-11 14:09:05 -07:00
parent 0acfe0de9e
commit ff731f3678
6 changed files with 65 additions and 6 deletions

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@ -145,10 +145,10 @@ ESP32_BOOT = common/boot.fs common/conditionals.fs common/vocabulary.fs \
esp32/bindings.fs common/highlevel.fs \ esp32/bindings.fs common/highlevel.fs \
common/filetools.fs common/utils.fs common/locals.fs \ common/filetools.fs common/utils.fs common/locals.fs \
common/tasks.fs common/streams.fs esp32/web_interface.fs \ common/tasks.fs common/streams.fs esp32/web_interface.fs \
esp32/registers.fs esp32/timers.fs \
esp32/bterm.fs esp32/telnetd.fs \ esp32/bterm.fs esp32/telnetd.fs \
esp32/camera.fs common/blocks.fs \ esp32/camera.fs common/blocks.fs \
esp32/autoboot.fs \ esp32/autoboot.fs common/fini.fs
common/fini.fs
$(GEN)/esp32_boot.h: common/source_to_string.js $(ESP32_BOOT) | $(GEN) $(GEN)/esp32_boot.h: common/source_to_string.js $(ESP32_BOOT) | $(GEN)
echo "ok" | cat $(ESP32_BOOT) - | $< boot $(VERSION) $(REVISION) >$@ echo "ok" | cat $(ESP32_BOOT) - | $< boot $(VERSION) $(REVISION) >$@

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@ -1,8 +1,6 @@
: ( 41 parse drop drop ; immediate : ( 41 parse drop drop ; immediate
( Useful Basic Compound Words ) ( Useful Basic Compound Words )
: 2drop ( n n -- ) drop drop ;
: 2dup ( a b -- a b a b ) over over ;
: nip ( a b -- b ) swap drop ; : nip ( a b -- b ) swap drop ;
: rdrop ( r: n n -- ) r> r> drop >r ; : rdrop ( r: n n -- ) r> r> drop >r ;
: */ ( n n n -- n ) */mod nip ; : */ ( n n n -- n ) */mod nip ;
@ -28,6 +26,12 @@
: 4* 4 * ; : 4/ 4 / ; : 4* 4 * ; : 4/ 4 / ;
: +! ( n a -- ) swap over @ + swap ! ; : +! ( n a -- ) swap over @ + swap ! ;
( Double Words )
: 2drop ( n n -- ) drop drop ;
: 2dup ( a b -- a b a b ) over over ;
: 2@ ( a -- lo hi ) dup @ swap cell+ @ ;
: 2! ( lo hi a -- ) dup >r cell+ ! r> ! ;
( Line Comments ) ( Line Comments )
: \ nl parse drop drop ; immediate : \ nl parse drop drop ; immediate

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@ -39,6 +39,8 @@ typedef int64_t dcell_t;
X("U/MOD", USMOD, w = *sp; *sp = (ucell_t) w % (ucell_t) tos; \ X("U/MOD", USMOD, w = *sp; *sp = (ucell_t) w % (ucell_t) tos; \
tos = (ucell_t) w / (ucell_t) tos) \ tos = (ucell_t) w / (ucell_t) tos) \
X("*/MOD", SSMOD, SSMOD_FUNC) \ X("*/MOD", SSMOD, SSMOD_FUNC) \
Y(LSHIFT, tos = (*sp-- << tos)) \
Y(RSHIFT, tos = (*sp-- >> tos)) \
Y(AND, tos &= *sp--) \ Y(AND, tos &= *sp--) \
Y(OR, tos |= *sp--) \ Y(OR, tos |= *sp--) \
Y(XOR, tos ^= *sp--) \ Y(XOR, tos ^= *sp--) \

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@ -0,0 +1,8 @@
vocabulary registers registers definitions
( Tools for working with bit masks )
: m! ( val shift mask a -- )
dup >r @ over invert and >r >r lshift r> and r> or r> ! ;
: m@ ( shift mask a -- val ) @ and swap rshift ;
only forth definitions

44
ueforth/esp32/timers.fs Normal file
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@ -0,0 +1,44 @@
vocabulary timers timers definitions also registers
$3ff5f00 constant TIMG_BASE
( group n = 0/1, timer x = 0/1, watchdog m = 0-5 )
: TIMGn ( n x -- a ) $10000 * + TIMG_BASE + ;
: TIMGn_Tx ( n x -- a ) $24 * swap TIMGn + ;
: TIMGn_TxCONFIG_REG ( n x -- a ) TIMGn_Tx 0 cells + ;
: TIMGn_TxLOHI_REG ( n x -- a ) TIMGn_Tx 1 cells + ;
: TIMGn_TxUPDATE_REG ( n x -- a ) TIMGn_Tx 3 cells + ;
: TIMGn_TxALARMLOHI_REG ( n x -- a ) TIMGn_Tx 4 cells + ;
: TIMGn_TxLOADLOHI_REG ( n x -- a ) TIMGn_Tx 6 cells + ;
: TIMGn_TxLOAD_REG ( n x -- a ) TIMGn_Tx 8 cells + ;
: TIMGn_Tx_WDTCONFIGm_REG ( n m -- a ) swap TIMGn cells + $48 + ;
: TIMGn_Tx_WDTFEED_REG ( n -- a ) TIMGn $60 + ;
: TIMGn_Tx_WDTWPROTECT_REG ( n -- a ) TIMGn $6c + ;
: TIMGn_RTCCALICFG_REG ( n -- a ) TIMGn $68 + ;
: TIMGn_RTCCALICFG1_REG ( n -- a ) TIMGn $6c + ;
: TIMGn_Tx_INT_ENA_REG ( n -- a ) TIMGn $98 + ;
: TIMGn_Tx_INT_RAW_REG ( n -- a ) TIMGn $9c + ;
: TIMGn_Tx_INT_ST_REG ( n -- a ) TIMGn $a0 + ;
: TIMGn_Tx_INT_CLR_REG ( n -- a ) TIMGn $a4 + ;
: t>nx ( t -- n x ) dup 2/ 1 and swap 1 and ;
: timer@ ( t -- lo hi )
dup t>nx TIMGn_TxUPDATE_REG 0 swap !
t>nx TIMGn_TxLOHI_REG 2@ ;
: timer! ( lo hi t -- )
dup >r t>nx TIMGn_TxLOADLOHI_REG 2!
r> t>nx TIMGn_TxLOAD_REG 0 swap ! ;
: alarm ( t -- a ) t>nx TIMGn_TxALARMLOHI_REG ;
: enable! ( v t ) >r 31 $80000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: increase! ( v t ) >r 30 $40000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: autoreload! ( v t ) >r 29 $20000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: divider! ( v t ) >r 3 $1ffffff8 r> t>nx TIMGn_TxCONFIG_REG m! ;
: edgeint! ( v t ) >r 2 $4 r> t>nx TIMGn_TxCONFIG_REG m! ;
: levelint! ( v t ) >r 1 $2 r> t>nx TIMGn_TxCONFIG_REG m! ;
: alarm-enable! ( v t ) >r 0 $1 r> t>nx TIMGn_TxCONFIG_REG m! ;
only forth definitions

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@ -70,8 +70,9 @@ are then used to build up a small set of core opcodes defined in 1-3 lines each:
<pre> <pre>
0= 0&lt; + U/MOD */MOD AND OR XOR 0= 0&lt; + U/MOD */MOD AND OR XOR
DUP SWAP OVER DROP @ L@ C@ ! L! C! LSHIFT RSHIFT DUP SWAP OVER DROP
SP@ SP! RP@ RP! &gt;R R&gt; R@ : ; EXIT @ L@ C@ ! L! C! SP@ SP! RP@ RP!
&gt;R R&gt; R@ : ; EXIT
EXECUTE BRANCH 0BRANCH DONEXT DOLIT EXECUTE BRANCH 0BRANCH DONEXT DOLIT
ALITERAL CELL DOES&gt; IMMEDIATE 'SYS ALITERAL CELL DOES&gt; IMMEDIATE 'SYS
</pre> </pre>