Replumbing timers working around Arduino change.

Bumping version number and changing example.

Interrupt WDT now makes example flaky so changing.
This commit is contained in:
Brad Nelson
2023-04-17 18:10:20 -07:00
parent c7dcbbef36
commit c43cbfd9d9
5 changed files with 106 additions and 61 deletions

View File

@ -75,6 +75,11 @@ static void IRAM_ATTR HandleInterrupt(void *arg) {
forth_run(rp);
}
static bool IRAM_ATTR HandleInterruptAndRet(void *arg) {
HandleInterrupt(arg);
return true;
}
static cell_t EspIntrAlloc(cell_t source, cell_t flags, cell_t xt, cell_t arg, void *ret) {
// NOTE: Leaks memory.
struct handle_interrupt_args *args = (struct handle_interrupt_args *) malloc(sizeof(struct handle_interrupt_args));
@ -91,11 +96,19 @@ static cell_t GpioIsrHandlerAdd(cell_t pin, cell_t xt, cell_t arg) {
return gpio_isr_handler_add((gpio_num_t) pin, HandleInterrupt, args);
}
static cell_t TimerIsrRegister(cell_t group, cell_t timer, cell_t xt, cell_t arg, cell_t flags, void *ret) {
static void TimerInitNull(cell_t group, cell_t timer) {
// Seems to be required starting in the 2.0 IDE.
timer_config_t config;
memset(&config, 0, sizeof(config));
config.divider = 2;
timer_init((timer_group_t) group, (timer_idx_t) timer, &config);
}
static cell_t TimerIsrCallbackAdd(cell_t group, cell_t timer, cell_t xt, cell_t arg, cell_t flags) {
// NOTE: Leaks memory.
struct handle_interrupt_args *args = (struct handle_interrupt_args *) malloc(sizeof(struct handle_interrupt_args));
args->xt = xt;
args->arg = arg;
return timer_isr_register((timer_group_t) group, (timer_idx_t) timer, HandleInterrupt, args, flags, (timer_isr_handle_t *) ret);
return timer_isr_callback_add((timer_group_t) group, (timer_idx_t) timer, HandleInterruptAndRet, args, flags);
}
#endif

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@ -298,7 +298,8 @@ static cell_t ResizeFile(cell_t fd, cell_t size);
# include "driver/gpio.h"
static cell_t EspIntrAlloc(cell_t source, cell_t flags, cell_t xt, cell_t arg, void *ret);
static cell_t GpioIsrHandlerAdd(cell_t pin, cell_t xt, cell_t arg);
static cell_t TimerIsrRegister(cell_t group, cell_t timer, cell_t xt, cell_t arg, cell_t flags, void *ret);
static cell_t TimerIsrCallbackAdd(cell_t group, cell_t timer, cell_t xt, cell_t arg, cell_t flags);
static void TimerInitNull(cell_t group, cell_t timer);
# endif
# define OPTIONAL_INTERRUPTS_SUPPORT \
YV(interrupts, gpio_config, n0 = gpio_config((const gpio_config_t *) a0)) \
@ -328,7 +329,43 @@ static cell_t TimerIsrRegister(cell_t group, cell_t timer, cell_t xt, cell_t arg
YV(interrupts, gpio_get_drive_capability, n0 = gpio_get_drive_capability((gpio_num_t) n1, (gpio_drive_cap_t *) a0); NIP) \
YV(interrupts, esp_intr_alloc, n0 = EspIntrAlloc(n4, n3, n2, n1, a0); NIPn(4)) \
YV(interrupts, esp_intr_free, n0 = esp_intr_free((intr_handle_t) n0)) \
YV(timers, timer_isr_register, n0 = TimerIsrRegister(n5, n4, n3, n2, n1, a0); NIPn(5))
YV(timers, timer_isr_callback_add, n0 = TimerIsrCallbackAdd(n4, n3, n2, n1, n0); NIPn(4)) \
YV(timers, timer_init_null, TimerInitNull(n1, n0); DROPn(2)) \
YV(timers, timer_get_counter_value, \
n0 = timer_get_counter_value((timer_group_t) n2, (timer_idx_t) n1, \
(uint64_t *) a0); NIPn(2)) \
YV(timers, timer_set_counter_value, \
uint64_t val = *(uint64_t *) a0; \
n0 = timer_set_counter_value((timer_group_t) n2, (timer_idx_t) n1, val); NIPn(2)) \
YV(timers, timer_start, \
n0 = timer_start((timer_group_t) n1, (timer_idx_t) n0); NIP) \
YV(timers, timer_pause, \
n0 = timer_pause((timer_group_t) n1, (timer_idx_t) n0); NIP) \
YV(timers, timer_set_counter_mode, \
n0 = timer_set_counter_mode((timer_group_t) n2, (timer_idx_t) n1, \
(timer_count_dir_t) n0); NIPn(2)) \
YV(timers, timer_set_auto_reload, \
n0 = timer_set_auto_reload((timer_group_t) n2, (timer_idx_t) n1, \
(timer_autoreload_t) n0); NIPn(2)) \
YV(timers, timer_set_divider, \
n0 = timer_set_divider((timer_group_t) n2, (timer_idx_t) n1, n0); NIPn(2)) \
YV(timers, timer_set_alarm_value, uint64_t val = *(uint64_t *) a0; \
n0 = timer_set_alarm_value((timer_group_t) n2, (timer_idx_t) n1, val); NIPn(2)) \
YV(timers, timer_get_alarm_value, \
n0 = timer_get_alarm_value((timer_group_t) n2, (timer_idx_t) n1, \
(uint64_t *) a0); NIPn(2)) \
YV(timers, timer_set_alarm, \
n0 = timer_set_alarm((timer_group_t) n2, (timer_idx_t) n1, \
(timer_alarm_t) n0); NIPn(2)) \
YV(timers, timer_group_intr_enable, \
n0 = timer_group_intr_enable((timer_group_t) n1, (timer_intr_t) n0); NIP) \
YV(timers, timer_group_intr_disable, \
n0 = timer_group_intr_disable((timer_group_t) n1, (timer_intr_t) n0); NIP) \
YV(timers, timer_enable_intr, \
n0 = timer_enable_intr((timer_group_t) n1, (timer_idx_t) n0); NIP) \
YV(timers, timer_disable_intr, \
n0 = timer_disable_intr((timer_group_t) n1, (timer_idx_t) n0); NIP)
#endif
#ifndef ENABLE_RMT_SUPPORT

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@ -23,63 +23,44 @@ vocabulary timers timers definitions
also registers also interrupts also internals
transfer timers-builtins
$3ff5f000 constant TIMG_BASE
( group n = 0/1, timer x = 0/1, watchdog m = 0-5 )
: TIMGn ( n -- a ) $1000 * TIMG_BASE + ;
: TIMGn_Tx ( n x -- a ) $24 * swap TIMGn + ;
: TIMGn_TxCONFIG_REG ( n x -- a ) TIMGn_Tx 0 cells + ;
: TIMGn_TxLOHI_REG ( n x -- a ) TIMGn_Tx 1 cells + ;
: TIMGn_TxUPDATE_REG ( n x -- a ) TIMGn_Tx 3 cells + ;
: TIMGn_TxALARMLOHI_REG ( n x -- a ) TIMGn_Tx 4 cells + ;
: TIMGn_TxLOADLOHI_REG ( n x -- a ) TIMGn_Tx 6 cells + ;
: TIMGn_TxLOAD_REG ( n x -- a ) TIMGn_Tx 8 cells + ;
: TIMGn_Tx_WDTCONFIGm_REG ( n m -- a ) swap TIMGn cells + $48 + ;
: TIMGn_Tx_WDTFEED_REG ( n -- a ) TIMGn $60 + ;
: TIMGn_Tx_WDTWPROTECT_REG ( n -- a ) TIMGn $6c + ;
: TIMGn_RTCCALICFG_REG ( n -- a ) TIMGn $68 + ;
: TIMGn_RTCCALICFG1_REG ( n -- a ) TIMGn $6c + ;
: TIMGn_Tx_INT_ENA_REG ( n -- a ) TIMGn $98 + ;
: TIMGn_Tx_INT_RAW_REG ( n -- a ) TIMGn $9c + ;
: TIMGn_Tx_INT_ST_REG ( n -- a ) TIMGn $a0 + ;
: TIMGn_Tx_INT_CLR_REG ( n -- a ) TIMGn $a4 + ;
( Initialize all timers, to mimic pre-2.0 behavior. )
0 0 timer_init_null
0 1 timer_init_null
1 0 timer_init_null
1 1 timer_init_null
( 0-4 -> two cells )
: t>nx ( t -- n x ) dup 2/ 1 and swap 1 and ;
: timer@ ( t -- lo hi )
dup t>nx TIMGn_TxUPDATE_REG 0 swap !
t>nx TIMGn_TxLOHI_REG 2@ ;
: timer! ( lo hi t -- )
dup >r t>nx TIMGn_TxLOADLOHI_REG 2!
r> t>nx TIMGn_TxLOAD_REG 0 swap ! ;
: alarm ( t -- a ) t>nx TIMGn_TxALARMLOHI_REG ;
create tmp 2 cells allot
: timer@ ( t -- lo hi ) t>nx tmp timer_get_counter_value throw tmp 2@ ;
: timer! ( lo hi t -- ) >r tmp 2! r> t>nx tmp timer_set_counter_value throw ;
: alarm@ ( t -- lo hi ) t>nx tmp timer_get_alarm_value throw tmp 2@ ;
: alarm! ( lo hi t -- ) >r tmp 2! r> t>nx tmp timer_set_alarm_value throw ;
: enable! ( v t ) >r 31 $80000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: increase! ( v t ) >r 30 $40000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: autoreload! ( v t ) >r 29 $20000000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: divider! ( v t ) >r 13 $1fffc000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: edgeint! ( v t ) >r 12 $1000 r> t>nx TIMGn_TxCONFIG_REG m! ;
: levelint! ( v t ) >r 11 $800 r> t>nx TIMGn_TxCONFIG_REG m! ;
: alarm-enable! ( v t ) >r 10 $400 r> t>nx TIMGn_TxCONFIG_REG m! ;
: alarm-enable@ ( v t ) >r 10 $400 r> t>nx TIMGn_TxCONFIG_REG m@ ;
: enable! ( v t )
swap >r t>nx r> if timer_start else timer_pause then throw ;
: increase! ( v t ) swap >r t>nx r> timer_set_counter_mode throw ;
: autoreload! ( v t ) swap >r t>nx r> timer_set_auto_reload throw ;
: divider! ( v t ) swap >r t>nx r> timer_set_divider throw ;
: alarm-enable! ( v t ) swap >r t>nx r> timer_set_alarm throw ;
: int-enable! ( f t -- )
t>nx swap >r dup 1 swap lshift r> TIMGn_Tx_INT_ENA_REG m! ;
swap >r t>nx r> if timer_enable_intr else timer_disable_intr then throw ;
: onalarm ( xt t ) swap >r t>nx r> 0 ESP_INTR_FLAG_EDGE 0
timer_isr_register throw ;
: interval ( xt usec t ) 80 over divider!
swap over 0 swap alarm 2!
: onalarm ( xt t ) swap >r t>nx r>
0 ESP_INTR_FLAG_EDGE timer_isr_callback_add throw ;
: interval ( xt usec t ) 0 over enable!
0 over int-enable!
80 over divider!
swap over 0 swap alarm!
dup >r onalarm r>
dup >r 0 0 r> timer!
1 over increase!
1 over autoreload!
1 over alarm-enable!
1 over edgeint!
0 over 0 swap timer!
dup >r onalarm r>
1 over int-enable!
1 swap enable! ;
: rerun ( t -- ) 1 swap alarm-enable! ;
only forth definitions
timers