Pulled interrupts into an optional module.
This commit is contained in:
Brad Nelson
37
esp32/optional/interrupts/interrupts.fs
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37
esp32/optional/interrupts/interrupts.fs
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\ Copyright 2023 Bradley D. Nelson
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\
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\ Licensed under the Apache License, Version 2.0 (the "License");
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\ you may not use this file except in compliance with the License.
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\ You may obtain a copy of the License at
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\
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\ http://www.apache.org/licenses/LICENSE-2.0
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\
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\ Unless required by applicable law or agreed to in writing, software
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\ distributed under the License is distributed on an "AS IS" BASIS,
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\ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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\ See the License for the specific language governing permissions and
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\ limitations under the License.
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vocabulary interrupts interrupts definitions
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transfer interrupts-builtins
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DEFINED? gpio_config [IF]
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0 constant ESP_INTR_FLAG_DEFAULT
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: ESP_INTR_FLAG_LEVELn ( n=1-6 -- n ) 1 swap lshift ;
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1 7 lshift constant ESP_INTR_FLAG_NMI
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1 8 lshift constant ESP_INTR_FLAG_SHARED
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1 9 lshift constant ESP_INTR_FLAG_EDGE
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1 10 lshift constant ESP_INTR_FLAG_IRAM
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1 11 lshift constant ESP_INTR_FLAG_INTRDISABLED
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( Prefix these with # because GPIO_INTR_DISABLE conflicts with a function. )
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0 constant #GPIO_INTR_DISABLE
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1 constant #GPIO_INTR_POSEDGE
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2 constant #GPIO_INTR_NEGEDGE
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3 constant #GPIO_INTR_ANYEDGE
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4 constant #GPIO_INTR_LOW_LEVEL
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5 constant #GPIO_INTR_HIGH_LEVEL
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( Easy word to trigger on any change to a pin )
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ESP_INTR_FLAG_DEFAULT gpio_install_isr_service drop
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: pinchange ( xt pin ) dup #GPIO_INTR_ANYEDGE gpio_set_intr_type throw
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swap 0 gpio_isr_handler_add throw ;
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[THEN]
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forth definitions
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152
esp32/optional/interrupts/interrupts.h
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152
esp32/optional/interrupts/interrupts.h
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// Copyright 2023 Bradley D. Nelson
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#define INTERRUPT_STACK_CELLS 64
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#include "esp_intr_alloc.h"
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#include "driver/timer.h"
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#include "driver/gpio.h"
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static cell_t EspIntrAlloc(cell_t source, cell_t flags, cell_t xt, cell_t arg, void *ret);
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static cell_t GpioIsrHandlerAdd(cell_t pin, cell_t xt, cell_t arg);
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static cell_t TimerIsrCallbackAdd(cell_t group, cell_t timer, cell_t xt, cell_t arg, cell_t flags);
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static void TimerInitNull(cell_t group, cell_t timer);
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#define OPTIONAL_INTERRUPTS_VOCABULARIES V(interrupts) V(timers)
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#define OPTIONAL_INTERRUPTS_SUPPORT \
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XV(internals, "interrupts-source", INTERRUPTS_SOURCE, \
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PUSH interrupts_source; PUSH sizeof(interrupts_source) - 1) \
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YV(interrupts, gpio_config, n0 = gpio_config((const gpio_config_t *) a0)) \
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YV(interrupts, gpio_reset_pin, n0 = gpio_reset_pin((gpio_num_t) n0)) \
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YV(interrupts, gpio_set_intr_type, n0 = gpio_set_intr_type((gpio_num_t) n1, (gpio_int_type_t) n0); NIP) \
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YV(interrupts, gpio_intr_enable, n0 = gpio_intr_enable((gpio_num_t) n0)) \
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YV(interrupts, gpio_intr_disable, n0 = gpio_intr_disable((gpio_num_t) n0)) \
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YV(interrupts, gpio_set_level, n0 = gpio_set_level((gpio_num_t) n1, n0); NIP) \
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YV(interrupts, gpio_get_level, n0 = gpio_get_level((gpio_num_t) n0)) \
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YV(interrupts, gpio_set_direction, n0 = gpio_set_direction((gpio_num_t) n1, (gpio_mode_t) n0); NIP) \
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YV(interrupts, gpio_set_pull_mode, n0 = gpio_set_pull_mode((gpio_num_t) n1, (gpio_pull_mode_t) n0); NIP) \
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YV(interrupts, gpio_wakeup_enable, n0 = gpio_wakeup_enable((gpio_num_t) n1, (gpio_int_type_t) n0); NIP) \
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YV(interrupts, gpio_wakeup_disable, n0 = gpio_wakeup_disable((gpio_num_t) n0)) \
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YV(interrupts, gpio_pullup_en, n0 = gpio_pullup_en((gpio_num_t) n0)) \
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YV(interrupts, gpio_pullup_dis, n0 = gpio_pullup_dis((gpio_num_t) n0)) \
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YV(interrupts, gpio_pulldown_en, n0 = gpio_pulldown_en((gpio_num_t) n0)) \
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YV(interrupts, gpio_pulldown_dis, n0 = gpio_pulldown_dis((gpio_num_t) n0)) \
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YV(interrupts, gpio_hold_en, n0 = gpio_hold_en((gpio_num_t) n0)) \
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YV(interrupts, gpio_hold_dis, n0 = gpio_hold_dis((gpio_num_t) n0)) \
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YV(interrupts, gpio_deep_sleep_hold_en, gpio_deep_sleep_hold_en()) \
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YV(interrupts, gpio_deep_sleep_hold_dis, gpio_deep_sleep_hold_dis()) \
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YV(interrupts, gpio_install_isr_service, n0 = gpio_install_isr_service(n0)) \
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YV(interrupts, gpio_uninstall_isr_service, gpio_uninstall_isr_service()) \
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YV(interrupts, gpio_isr_handler_add, n0 = GpioIsrHandlerAdd(n2, n1, n0); NIPn(2)) \
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YV(interrupts, gpio_isr_handler_remove, n0 = gpio_isr_handler_remove((gpio_num_t) n0)) \
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YV(interrupts, gpio_set_drive_capability, n0 = gpio_set_drive_capability((gpio_num_t) n1, (gpio_drive_cap_t) n0); NIP) \
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YV(interrupts, gpio_get_drive_capability, n0 = gpio_get_drive_capability((gpio_num_t) n1, (gpio_drive_cap_t *) a0); NIP) \
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YV(interrupts, esp_intr_alloc, n0 = EspIntrAlloc(n4, n3, n2, n1, a0); NIPn(4)) \
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YV(interrupts, esp_intr_free, n0 = esp_intr_free((intr_handle_t) n0)) \
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YV(timers, timer_isr_callback_add, n0 = TimerIsrCallbackAdd(n4, n3, n2, n1, n0); NIPn(4)) \
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YV(timers, timer_init_null, TimerInitNull(n1, n0); DROPn(2)) \
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YV(timers, timer_get_counter_value, \
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n0 = timer_get_counter_value((timer_group_t) n2, (timer_idx_t) n1, \
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(uint64_t *) a0); NIPn(2)) \
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YV(timers, timer_set_counter_value, \
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uint64_t val = *(uint64_t *) a0; \
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n0 = timer_set_counter_value((timer_group_t) n2, (timer_idx_t) n1, val); NIPn(2)) \
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YV(timers, timer_start, \
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n0 = timer_start((timer_group_t) n1, (timer_idx_t) n0); NIP) \
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YV(timers, timer_pause, \
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n0 = timer_pause((timer_group_t) n1, (timer_idx_t) n0); NIP) \
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YV(timers, timer_set_counter_mode, \
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n0 = timer_set_counter_mode((timer_group_t) n2, (timer_idx_t) n1, \
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(timer_count_dir_t) n0); NIPn(2)) \
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YV(timers, timer_set_auto_reload, \
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n0 = timer_set_auto_reload((timer_group_t) n2, (timer_idx_t) n1, \
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(timer_autoreload_t) n0); NIPn(2)) \
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YV(timers, timer_set_divider, \
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n0 = timer_set_divider((timer_group_t) n2, (timer_idx_t) n1, n0); NIPn(2)) \
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YV(timers, timer_set_alarm_value, uint64_t val = *(uint64_t *) a0; \
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n0 = timer_set_alarm_value((timer_group_t) n2, (timer_idx_t) n1, val); NIPn(2)) \
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YV(timers, timer_get_alarm_value, \
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n0 = timer_get_alarm_value((timer_group_t) n2, (timer_idx_t) n1, \
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(uint64_t *) a0); NIPn(2)) \
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YV(timers, timer_set_alarm, \
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n0 = timer_set_alarm((timer_group_t) n2, (timer_idx_t) n1, \
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(timer_alarm_t) n0); NIPn(2)) \
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YV(timers, timer_group_intr_enable, \
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n0 = timer_group_intr_enable((timer_group_t) n1, (timer_intr_t) n0); NIP) \
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YV(timers, timer_group_intr_disable, \
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n0 = timer_group_intr_disable((timer_group_t) n1, (timer_intr_t) n0); NIP) \
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YV(timers, timer_enable_intr, \
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n0 = timer_enable_intr((timer_group_t) n1, (timer_idx_t) n0); NIP) \
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YV(timers, timer_disable_intr, \
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n0 = timer_disable_intr((timer_group_t) n1, (timer_idx_t) n0); NIP)
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struct handle_interrupt_args {
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cell_t xt;
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cell_t arg;
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};
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static void IRAM_ATTR HandleInterrupt(void *arg) {
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struct handle_interrupt_args *args = (struct handle_interrupt_args *) arg;
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cell_t code[2];
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code[0] = args->xt;
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code[1] = g_sys->YIELD_XT;
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cell_t fstack[INTERRUPT_STACK_CELLS];
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cell_t rstack[INTERRUPT_STACK_CELLS];
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cell_t stack[INTERRUPT_STACK_CELLS];
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stack[0] = args->arg;
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cell_t *rp = rstack;
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*++rp = (cell_t) code;
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*++rp = (cell_t) (fstack + 1);
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*++rp = (cell_t) (stack + 1);
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forth_run(rp);
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}
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static bool IRAM_ATTR HandleInterruptAndRet(void *arg) {
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HandleInterrupt(arg);
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return true;
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}
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static cell_t EspIntrAlloc(cell_t source, cell_t flags, cell_t xt, cell_t arg, void *ret) {
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// NOTE: Leaks memory.
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struct handle_interrupt_args *args = (struct handle_interrupt_args *) malloc(sizeof(struct handle_interrupt_args));
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args->xt = xt;
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args->arg = arg;
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return esp_intr_alloc(source, flags, HandleInterrupt, args, (intr_handle_t *) ret);
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}
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static cell_t GpioIsrHandlerAdd(cell_t pin, cell_t xt, cell_t arg) {
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// NOTE: Leaks memory.
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struct handle_interrupt_args *args = (struct handle_interrupt_args *) malloc(sizeof(struct handle_interrupt_args));
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args->xt = xt;
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args->arg = arg;
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return gpio_isr_handler_add((gpio_num_t) pin, HandleInterrupt, args);
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}
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static void TimerInitNull(cell_t group, cell_t timer) {
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// Seems to be required starting in the 2.0 IDE.
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timer_config_t config;
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memset(&config, 0, sizeof(config));
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config.divider = 2;
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timer_init((timer_group_t) group, (timer_idx_t) timer, &config);
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}
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static cell_t TimerIsrCallbackAdd(cell_t group, cell_t timer, cell_t xt, cell_t arg, cell_t flags) {
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// NOTE: Leaks memory.
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struct handle_interrupt_args *args = (struct handle_interrupt_args *) malloc(sizeof(struct handle_interrupt_args));
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args->xt = xt;
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args->arg = arg;
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return timer_isr_callback_add((timer_group_t) group, (timer_idx_t) timer, HandleInterruptAndRet, args, flags);
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}
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{{interrupts}}
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67
esp32/optional/interrupts/timers.fs
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67
esp32/optional/interrupts/timers.fs
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@ -0,0 +1,67 @@
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\ Copyright 2021 Bradley D. Nelson
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\
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\ Licensed under the Apache License, Version 2.0 (the "License");
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\ you may not use this file except in compliance with the License.
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\ You may obtain a copy of the License at
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\
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\ http://www.apache.org/licenses/LICENSE-2.0
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\
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\ Unless required by applicable law or agreed to in writing, software
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\ distributed under the License is distributed on an "AS IS" BASIS,
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\ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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\ See the License for the specific language governing permissions and
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\ limitations under the License.
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internals definitions
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transfer timers-builtins
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forth definitions
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( Lazy loaded timers )
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: timers r|
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vocabulary timers timers definitions
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also registers also interrupts also internals
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transfer timers-builtins
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( Initialize all timers, to mimic pre-2.0 behavior. )
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0 0 timer_init_null
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0 1 timer_init_null
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1 0 timer_init_null
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1 1 timer_init_null
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( 0-4 -> two cells )
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: t>nx ( t -- n x ) dup 2/ 1 and swap 1 and ;
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create tmp 2 cells allot
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: timer@ ( t -- lo hi ) t>nx tmp timer_get_counter_value throw tmp 2@ ;
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: timer! ( lo hi t -- ) >r tmp 2! r> t>nx tmp timer_set_counter_value throw ;
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: alarm@ ( t -- lo hi ) t>nx tmp timer_get_alarm_value throw tmp 2@ ;
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: alarm! ( lo hi t -- ) >r tmp 2! r> t>nx tmp timer_set_alarm_value throw ;
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: enable! ( v t )
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swap >r t>nx r> if timer_start else timer_pause then throw ;
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: increase! ( v t ) swap >r t>nx r> timer_set_counter_mode throw ;
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: autoreload! ( v t ) swap >r t>nx r> timer_set_auto_reload throw ;
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: divider! ( v t ) swap >r t>nx r> timer_set_divider throw ;
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: alarm-enable! ( v t ) swap >r t>nx r> timer_set_alarm throw ;
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: int-enable! ( f t -- )
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swap >r t>nx r> if timer_enable_intr else timer_disable_intr then throw ;
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: onalarm ( xt t ) swap >r t>nx r>
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0 ESP_INTR_FLAG_EDGE timer_isr_callback_add throw ;
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: interval ( xt usec t ) 0 over enable!
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0 over int-enable!
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80 over divider!
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swap over 0 swap alarm!
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dup >r onalarm r>
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dup >r 0 0 r> timer!
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1 over increase!
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1 over autoreload!
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1 over alarm-enable!
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1 over int-enable!
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1 swap enable! ;
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only forth definitions
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timers
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| evaluate ;
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